As is well known, a final output stage of a generic electronic circuit, of any degree of complexity, basically comprises a driver portion or stage arranged to deliver electric power to a load. Therefore, the stage must be capable of draining or drawing current from the load according to necessity and the type of application.
Countless configurations have been devised for state-of-art output stages. Shown schematically in the accompanying FIG. 1 is one of the most common output stage configurations.
The output stage of FIG. 1 comprises a complementary pair of MOS transistors connected in series between a first voltage reference Vdd and a second voltage reference Vss, wherein the latter may be a negative supply or ground.
The first transistor M1 in the complementary pair is a pull-down transistor of either the NMOS or the DMOS type, and has its body terminal connected to the source terminal.
The second transistor M2 in the complementary pair is a pull-up transistor of the PMOS type, and has its body terminal connected to the source terminal.
Respective driving stages have respective outputs connected to the gate terminals of the transistors M1 and M2.
The two transistors, M1 and M2, are connected together by their drain terminals, which are coincident with an output node OUT. An electric load LOAD is connected between the output node OUT and a ground.
The load LOAD is driven alternatively by the PMOS transistor M2 or the NMOS transistor M1, depending on the different sourcing or sinking operational steps.
The complementary pairs of MOS transistors are those most widely used for implementing output stages on account of the clear advantages that they can offer as concerns the control logics. However, the considerations made hereinafter can also apply to output stage configurations which incorporate bipolar transistors or other pairs of MOS transistors.
FIG. 2 shows, for example, an output stage incorporating a pair of transistors which are both of either the NMOS or the DMOS type. These transistors M3, M4 are connected together at the output node OUT.
Some applications require that the current be looped back from the load to the positive and/or negative supplies. This is necessary, for instance, in the field of flat panels, where a high voltage pulser generates a pulsed supply.
FIG. 4 shows schematically an embodiment wherein two, respectively positive and negative pulsers supplying respective voltage references are associated with the circuit of FIG. 1.
During the rising edge of the supply signal, energy is delivered to the load, whereas during the signal falling edge, the load returns part of its energy to the supply line. FIG. 3 shows schematically the scalene trapezoid pattern of the supply voltage during the periods when such energy transfers occur.
The current loop-back is allowed by the bi-directional operability of the components employed, namely the PMOS, NMOS or DMOS transistors.
However, each MOS component has a parasitic diode associated therewith which affects operation in the reverse range.
As to the PMOS transistor, also present beside the parasitic diode formed by the drain-body p-n junction is a parasitic bipolar transistor of the vertical pnp type which is formed by the drain-body-substrate junctions.
Unfortunately, this parasitic bipolar transistor is also active during the operation of its associated MOS transistor, and instead of contributing to the current loop-back, will contribute to dissipating the current flowing through it to the substrate.
The above situation, additionally to being unfavorable from the viewpoint of energy recovery, may harm the output stage because the substrate potential can rise locally to the point of triggering more parasitic elements.
Thus, it becomes necessary to limit the gain of the parasitic transistor, e.g., by keeping its beta coefficient low using suitable techniques. Another solution could be that of "freezing" the areas around the PMOS transistor by means of appropriate substrate taps.
Other, more radical solutions provide for the use of SOI or dielectric insulation technologies.